clock register

英 [klɒk ˈredʒɪstə(r)]

美 [klɑːk ˈredʒɪstər]

网络时钟寄存器

Taking the characteristics of the three registers into account, we use the data register of the parallel interface to transmit data, the state register to receive data and synchronize clock and the control register to control the transceiver's PTT in this paper.
针对这3个寄存器特点，采用计算机并行接口数据寄存器发送数据，状态寄存器接收数据和同步时钟，控制寄存器控制电台PTT。
The key of this design is the design of instructions state machine. Every instruction cycle includes 8 machine clock cycles, is made up of fetch instruction, decoder instruction, execute instruction, writing RAM, writing register and reading RAM etc.
本设计的关键点为指令执行状态级的设计，每个指令周期包括8个机器时钟周期，由取指、译指、执指、RAM读、寄存器写、RAM写等组成；
Then we proposed an improved method, as for timing, it replaces system clock with TSC register, to eliminate clock errors; by modifying system kernel, it removes the time-stamping place from application to network driver to eliminate location errors.
提出一种改进的时延测量方法，以TSC寄存器计数取代系统时钟计时，减少了测量的时钟误差；修改系统内核，将时间戳记录位置由应用程序转移到网卡驱动，减少了测量的位置误差。